Maximum IR-Drop in On-Chip Power Distribution Networks of Wire-Bonded Integrated Circuits
نویسندگان
چکیده
A compact IR-drop model for on-chip power distribution networks in wire-bonded ICs is presented. Chip dimensions, metal coverage and piecewise distribution of the IC consumption are taken into account to obtain closed form expressions for the maximum IR-drop as well as its place. Comparison with simulations shows an error as small as 2% in most the cases.
منابع مشابه
Transient Modeling of Electromigration and Lifetime Analysis of Power Distribution Network for 3D ICs
In this paper, we present a transient modeling of electromigration (EM) in TSV and TSV-to-wire interfaces in the power delivery network (PDN) of 3D ICs. In particular, we model atomic depletion and accumulation, effective resistance degradation, and full chip-scale PDN lifetime degradation due to EM. Our major focuses are on: (1) timedependent multi-physics EM modeling approach to model TSVs an...
متن کاملClock skew verification in the presence of IR-drop in the powerdistribution network
Clocks are perhaps the most important circuits in high-speed digital systems. The design of clock circuitry and the quality of clock signals directly impact the performance of a very large scale integrated chip. Clock skew verification requires high accuracy and is typically performed using circuit simulators. However, in high-performance deep-submicrometer digital circuits, clocks are running ...
متن کاملIR DROP in High - Speed IC Packages
Today’s low-voltage, high-current designs require DC IR drop analysis for off-chip power distribution systems in order to optimize end-to-end voltage margins for every device on the distribution. This article will introduce the basics of IR drop analysis, exemplify the significance of IR drop associated with IC packages and PCBs, and demonstrate typical IR drop simulations for the identificatio...
متن کاملTransient IR Voltage Drops in CMOS-Based Power Distribution Networks
Decreased power supply levels have reduced the tolerance to voltage changes within power distribution networks in CMOS integrated circuits. High on-chip currents, required to charge and discharge large on-chip loads while operating at high frequencies, produce significant transient IR voltage drops within a power distribution network. Analytical expressions characterizing these transient IR vol...
متن کاملPackage routability- and IR-drop-aware finger/pad planning for single chip and stacking IC designs
Due to the increasing complexity of the design interactions between the chip and package, it is necessary to consider them at the same time. In order to simultaneously handle chip and package performances, co-design of chip and package is a widely adopted solution, particularly because the finger/pad locations significantly affect IR-drop of the core and the package routing. In this paper, we d...
متن کامل